The present invention relates generally to voltage converters, and, more particularly, to step down DC-to-DC converters that convert a voltage from a primary power source to a stepped-down voltage.
With reference to FIG. 1, in a typical step down converter, also known as a buck regulator 100, current through an inductor 101 is controlled by a switching transistor 102, typically a power transistor, (e.g., P-channel metal oxide semiconductor field effect transistor (PMOSFET)) and a diode 103. A drive signal is generated by a drive circuit 104 and applied to the gate of the switching transistor 102. When the switching transistor 102 is first turned on, the inductor 101 produces an opposing voltage and commences to store energy in response to the charging current, which reduces the net voltage across a load 105. When the switching transistor 102 is turned off, the diode 103 is forward biased and energy stored in the inductor 101 supports current flow through the load 105. If the switching transistor 102 is turned on again before the inductor 101 completely discharges its stored energy, the voltage across the load 105 will be greater than zero. A capacitor 106 is placed across the load 105 to smooth out voltage fluctuations as the inductor 101 stores and discharges energy with each switching cycle.
A typical driver circuit for the switching transistor 102 includes a PMOS (P-channel metal oxide semiconductor) transistor 107 coupled in series with a NMOS (N-channel metal oxide semiconductor) transistor 108 between a power supply Vin and ground. When the switching transistor 102 is to be driven off, the PMOS transistor 107 is turned on in order to drive the gate of the switching transistor 102 to Vin. When the gate of the switching transistor 102 is driven high, the parasitic capacitance of the transistor 102 is charged towards Vin and reaches Vin if the gate of the PMOS transistor 107 is on for a sufficient length of time. The NMOS transistor 108 is used to drive the gate of the switching transistor 102 to ground in order to turn the transistor 102 on. When the NMOS transistor 108 is on (and conducting), it discharges the parasitic capacitance to ground and the charge stored on it is lost.
Buck regulators suffer various losses that affect efficiency, with efficiency tending to be lower under low load current conditions than higher current conditions. In certain conditions it may be that the energy required to turn power devices on and off is greater than that required by the load itself. Two significant factors that can affect efficiency in both high and low load conditions are conduction loss and switching loss in the switching transistor, with switching losses being worse at higher switching frequencies (typically 1 MHz or 2 MHz). Conduction loss may be reduced by using larger devices and charge pumps, but both these measures can have adverse effects on switching loss. On the other hand, switching loss can arise due to the repeated charging and discharging of the gate capacitance of the switching transistor. Accordingly, it would be advantageous to provide a regulator whose switching losses are low enough to permit the use of larger power devices, charge pumps and operating at higher frequencies, yet still exhibit a high overall efficiency under high and low load conditions.